What are some uses for this technology?


Any circuit can be built on a Cell Matrix™. Given that the hardware design is one that is extremely inexpensive to manufacture, we eventually expect ours to be a reasonable hardware platform for lots of circuits just based on cost and time-to-market.

There are also many useful circuits that are particular to the Cell Matrix computing architecture and that take full advantage of its unique feature set. These classes of circuits are generally either massive, highly parallel circuits, or self-modifying, self-assembling, and/or self-organizing circuits.

What is a self-modifying circuit? One example is evolvable hardware algorithms cast in Cell Matrix hardware. These circuits can leave the factory looking identical to each other, but out in the field, they iterate to determine the ideal circuit to fit the problems they encounter. Another example is built-in compensation for manufacturing defects or runtime faults. This compensation cannot be done at circuit design time, and it can be expensive to do at manufacturing time. With a Cell Matrix, neither is necessary. Instead, system bootstrap circuits, and circuits in general, can include smarts that give them the ability to compensate for faults, which is then automatically translated into particular compensatory actions on a per-chip basis, after manufacture.

The applications of self-modifying circuits represent a new frontier of circuit design, and there are many more challenging and interesting research problems beyond the two described above that could lead to innovative and extremely useful technologies. The Cell Matrix computing architecture provides hardware support and a conceptual framework for tackling such problems.

On the topic of massive, highly parallel circuits, the architecture's hardware support of parallel, distributed communication and control is an important ingredient of extremely large, parallel circuits and systems. The fault tolerance and scalability of the Cell Matrix also makes it a great hardware platform for extremely large systems, and also for extremely small systems. You can work with a matrix of whatever size you need. You can hook three Cell Matrices up at their edges and treat it all as one Cell Matrix, with no address space issues. Manufacturing of Cell Matrices need not be perfect, either. The architectural design limits the extent of faults to two levels of cells outward from the bad region, and systems are laid out after manufacture in the remaining good cells. This permits the use of denser, cutting edge fabrication technologies to construct Cell Matrix hardware.
    The combination of local, parallel control, with self-modification also supports the design and development of extra levels of fault compensation at runtime. For instance, new circuits can be built to take over missing function while other regions of the matrix continue to operate normally.


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