A Process Driver for Nanofabrication: Detecting and Analysing Hardware
Defects using the Cell Matrix Computing Architecture
L. Durbeck and Nicholas J. Macias
Accepted for Poster Session, 2001 Ninth Foresight Conference on Molecular
Technology, 9-11 Nov 2001, Santa Clara, CA
The Cell Matrix is a reconfigurable, universal computing architecture with properties that make it highly suitable for
construction using novel switch, gate, or circuit-building techniques and processes. The hardware design for Cell Matrices
appears to be highly useful for nanoelectronics as a process driver, an intermediate target built during the development of
a manufacturing technique to help in the "debugging" of the fabrication technique itself. Process drivers are used today by
chip foundries to refine their manufacturing processes: IBM uses a Xilinx FPGA. Recent work by the authors demonstrates
specific mechanisms for detecting, diagnosing, and compensating for hardware defects on a Cell Matrix.
A Cell Matrix is a good process driver, and build target, for several practical reasons. First, a cell is a simple structure,
requiring fabrication of a handful of logic gates, wires, and a small memory (48 bits for a 3-sided cell). Second, the matrix
structure is completely regular and can be built incrementally: a single cell can be constructed and tested, then joined with
another cell, and so on, because the number of cells in a matrix is not predetermined and does not affect the structure of,
or interconnection among, cells. Further, the dimensionality and topology of the hardware can be tailored to the needs of
the fabrication process: 2 or 3-dimensional matrices, or multiplanar matrices, made up of n-sided cells.
The second benefit of Cell Matrices as process drivers is the fine resolution they provide in detecting defects. Testing can
access all inputs and outputs of individual cells. Certain kinds of faults can be pinpointed down to the single cell level; most
others can be detected within 2 levels of neighboring cells outward from the faulty cell.
The authors have developed a method for thoroughly testing blocks of cells inside a Cell Matrix, even if they are
surrounded by other currently-operating circuits. The method can be used to detect defects on a new piece of hardware,
as well as during system operation, for run-time fault detection. Using a technique analogous to the "scandisk" program
used to test and mark bad sectors of a hard disk drive, faults are identified, and bad regions are marked, so that
subsequent operations may avoid faulty regions. Taking advantage of Cell Matrix-specific features, the testing is performed
autonomously, inside the Cell Matrix, as a set of distributed, local operations performed simultaneously in regions
throughout the matrix, in parallel, even potentially as hardware is being fabricated. The fault detection method has been
successfully implemented and tested.
The Cell Matrix computing architecture is a beneficial structure to attempt to construct because of its simplicity and its
utility as a process driver. Additionally, once fabrication of Cell Matrices reaches a sufficient level of quality, the resulting
hardware is quite useful, since it can in turn be used to implement any digital circuit, and it works perfectly well despite